The hottest Chip Design Substack posts right now

And their main takeaways
Category
Top Technology Topics
SemiAnalysis 22426 implied HN points 09 Feb 26
  1. Datacenter CPUs are back in demand because reinforcement learning, agentic models, and RAG-style inference need lots of general-purpose compute for environments, tool use, data sharding and media decode, which is driving hyperscalers and AI labs to build large CPU clusters and straining inventories.
  2. CPU architecture is rapidly shifting to chiplet/disaggregated designs, higher core counts and mesh interconnects with advanced packaging, and vendors are diverging — AMD and hyperscale ARM designs are outperforming while Intel faces delays and questionable design choices that hurt competitiveness.
  3. The broader system ecosystem now matters as much as raw CPU cores: GPUs and specialized CPUs act as head nodes with shared memory, DPUs and context-memory platforms change how memory is used, and DRAM shortages plus packaging yields are shaping performance, supply and pricing.
The Chip Letter 6334 implied HN points 04 Mar 26
  1. Nvidia is quickly integrating Groq’s low-latency processor technology and team and is expected to unveil a Groq-derived inference chip at GTC.
  2. Groq’s dataflow architecture plus years of compiler work could deliver extremely fast, low-latency inference if Nvidia combines it with its wider IP and engineering.
  3. If Nvidia pulls this off it could narrow the field of inference accelerators and become a major, potentially game-changing shift in computer architecture for AI.
SemiAnalysis 14850 implied HN points 08 Jan 26
  1. Apple’s huge, predictable orders and upfront funding were the anchor that let TSMC build and scale bleeding‑edge fabs, turning TSMC into the dominant foundry.
  2. The rise of AI/HPC demand (led by Nvidia and hyperscalers) has shifted the industry to a two‑anchor model, splitting wafer and packaging demand and reducing Apple’s relative share on some nodes while creating fierce competition for advanced packaging capacity.
  3. Apple vertically integrated chip design through acquisitions and internal teams to boost margins and product differentiation, while quietly diversifying non‑core production (and managing Taiwan concentration risk) with alternatives like Intel, Samsung, and Arizona fabs.
SemiAnalysis 33539 implied HN points 28 Nov 25
  1. Google's TPUs are becoming a serious competitor to Nvidia's GPUs, especially with big companies like Anthropic starting to use them. This might change the game in AI hardware.
  2. The design and architecture of Google's TPU systems, especially the new TPUv7, are optimized for better performance and cost efficiency. This means companies can save money on their AI infrastructures.
  3. Google is focusing on improving its software tools for TPUs, making them more user-friendly and possibly attracting more developers. This shift might help boost the adoption of TPUs over Nvidia's GPUs.
The Chip Letter 6770 implied HN points 13 Jan 26
  1. Qualcomm bought Ventana mainly to add experienced RISC-V CPU engineers and IP so it can accelerate its own CPU plans and reduce reliance on Arm.
  2. Ventana produced promising Veyron CPU designs (V1 then V2 with vector support) but appears to have struggled to convert that tech into clear customer wins.
  3. A bigger Qualcomm push into RISC-V could hurt Arm’s revenues given Qualcomm’s size, but RISC-V still faces major software and ecosystem hurdles before it can fully replace Arm for high-performance workloads.
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The Chip Letter 5241 implied HN points 31 Dec 25
  1. Groq’s LPUs deliver much faster, low‑latency AI inference by storing model parameters in on‑chip SRAM and linking many chips together, avoiding reliance on scarce HBM.
  2. Nvidia struck a non‑exclusive licence and talent deal that moves most Groq employees to Nvidia and pays shareholders, while Groq remains operating with a new CEO and GroqCloud continuing.
  3. Bringing Groq’s processors into Nvidia’s AI platform could let real‑time, high‑speed inference scale broadly and shift the economics and architecture of AI inference.
TheSequence 238 implied HN points 05 Mar 26
  1. Hardware drives modern deep learning: algorithms explain maybe 40% of progress and the rest comes from the compute, memory, and system-level engineering that makes training and inference practical.
  2. GPUs were a lucky fit for neural nets because their high arithmetic density matched the workload, but custom AI chips are needed to close remaining gaps by optimizing dataflow, precision, and memory access.
  3. Designing an AI chip is a layered engineering craft from architecture to physics and tape‑out, involving RTL/Verilog work, hardware–software co‑design, and careful trade‑offs across performance, power, and manufacturability.
ASeq Newsletter 21 implied HN points 05 Mar 26
  1. A newly found die photo lines up with the AGBT sensor module because the screw holes and exposed vias match, confirming they’re the same module.
  2. By rescaling the die image to the PCB (for which sizes are known), you can derive a size estimate for the die.
  3. The resulting estimate indicates the Roche SBX die is quite small, implying a more compact sensor/chip than many might expect.
Let Us Face the Future 238 implied HN points 14 Jul 23
  1. Optical computing uses light particles instead of electrons for computations, promising faster processing speeds and energy efficiency.
  2. Opto-electronic computing is close to commercialization, combining optical and electronic functions to leverage speed and bandwidth advantages.
  3. Optical computing faces challenges in adoption due to the need for changing components and manufacturing processes, but has potential for high-performance tasks like AI training.
Breaking Smart 83 implied HN points 25 Mar 23
  1. Silicon Valley is experiencing a generation shift in tech with the return of silicon fabrication to the region.
  2. The passing of Gordon Moore marks a significant moment in the tech industry and highlights the renewal underway.
  3. Actual silicon manufacturing hasn't been a common practice in Silicon Valley for decades, with most fabs moving to Asia.
HackerPulse Dispatch 16 implied HN points 22 Nov 24
  1. LLaVA-o1 helps vision-language models improve their reasoning skills with clear steps, making them better at understanding complex tasks.
  2. Brain-inspired pruning makes spiking neural networks much more efficient by keeping only the important parts, leading to significant cost savings.
  3. Generative agents can simulate thousands of people's behavior accurately, which can help in studying social science and creating better policies.
Bits and Bytes 5 HN points 16 Jul 23
  1. Moore's Law has driven progress in computing for decades by doubling transistor counts every 2 years.
  2. The management of complexity in computing has been achieved through abstraction and refactoring across multiple disciplines.
  3. Future advances in computing will likely involve raising the level of abstraction and introducing new tools to handle increasing transistor counts.
Thái | Hacker | Kỹ sư tin tặc 19 implied HN points 19 Sep 18
  1. The history of computer chip technology evolution highlights the shift from vacuum tubes to transistors leading to higher performance and faster clock speeds.
  2. The era of Moore's Law brought about significant advancements in chip design by increasing the number of transistors and optimizing instruction execution.
  3. With the end of Moore's Law approaching, the future of chip technology may involve domain-specific chips tailored for specific tasks, like deep learning, to overcome physical limitations and energy consumption challenges.
ASeq Newsletter 0 implied HN points 12 Nov 24
  1. The PacBio Vega Chips are similar to the Revio chips, but they provide much less data. This means they might not be as powerful for certain tasks.
  2. The data from the Vega chips is available for analysis, and people can check it out for deeper understanding.
  3. This information is part of a subscription service, which means you can get more insights if you become a paid member.
Sector 6 | The Newsletter of AIM 0 implied HN points 28 Dec 22
  1. Apple is moving to smaller 3nm chips for better efficiency in its devices. This will help iPhones and Macs perform better while saving power.
  2. The new 3nm chips promise to boost performance compared to the previous 4nm versions. This means faster and more capable devices for users.
  3. However, there's a challenge with chip production as TSMC, the manufacturer, is struggling to keep up with the high demand for these new chips.
Sector 6 | The Newsletter of AIM 0 implied HN points 29 Mar 23
  1. Chip technology is becoming more advanced, but making them smaller is getting harder. This means the way chips are designed needs to evolve.
  2. Moore's Law, which said chip components would double every year, is slowing down. We are reaching the limits of how many circuits can fit on a single chip.
  3. Nvidia has proposed a new way to improve chip design automation with their paper on automated placement of components. This could help overcome some of the challenges in current chip manufacturing.